I posted a preliminary copy of the cassette read and write board BOMs back in this posting.

Further investigation into the problem with the cassette write board reveals that the original SCELBI’s used revision A of the 7493 counter ICs, while I had purchased the original version. There seems to be significant differences in the specs, so I ordered a few 7493As to try. I’m fully expecting that the write board will work fine with the A revision parts, without having to change the capacitor. I have had very few problems with SCELBI designs in the past. I think that the inclusion of 7493As in production boards instead of plain vanilla 7493s was probably intentional, possibly to avoid the problem that I encountered.

The other change that is likely, is do to another image of the schematics that were sent to me. This version of the schematics have parts numbers labeled on the transistors. The image I received wasn’t all that clear, but the PNP types appear to be 2N2907 and the NPN types 2N2222. I doubt that the use of 2N3906 and 2N3904 on my reproduction in their place makes any difference, but I intend on updating the BOM.

I just added two items to my SCELBI PCB price list.

A set of SCELBI cassette interface boards is $50.

A complete set of all 13 boards needed to make up a full, 12K SRAM, 4K PROM, SCELBI 8B, plus cassette and TTY interfaces is available for $475.

8B Front Panels are not ready yet, as I have been focussed on the cassette interface for the past several weeks.

Send an email with your address and and questions to:mike@willegal.net for a shipping quote and ordering information.

Yeah!! Finally a SCELBI 8B is working like it was meant to be with TTY and cassette interface. This may be the only working fully configured SCELBI 8B in the world at this moment.

After much investigation, which I’ll document more fully in later posts, I finally figured out the problem with the SCELBI cassette interface. Turns out that the problem was on the write board. The .02 uF capacitor on the inputs to Z14 (pins 3 and 4) was creating problems with the counter at Z4, which uses the same clock. Apparently due to the altered shape of the clock, the counter was not counting properly. This created chaos with the written data. I changed the capacitor to .004 uF and everything started working perfectly.

Once I made this change, I just slightly tweaked cassette player volume and I was able to write and read a small buffer of all zeros and another of all ones. I was also able to write a 2K buffer of random data and read it back without any parity errors. I need to do some more testing and tuning, but based on this initial experience, I’m expecting that this interface will work pretty well in practice.

I’ll need to take a breath and figure out board prices, which will be similar or less than the TTY board and then, at last, I’ll be able to start shipping cassette PCBs.

Here’s a picture of my current SCELBI 8B setup, with TTY card, Cassette read and write cards and RS-232 dongle all attached. The TTY and Cassette cards will eventually be moved to enclosures with female 78S11 Amphenol connectors. These will be connected with standard SCELBI 11(really 12) conductor cable with male 86CP11 Amphenol connectors on both ends to the chassis.

SCELBI loaded up with I/O

First, my previous post had a mistake. Input is low(zero) on high frequency and high(one) on low frequency. I forgot to account for the inverter that does the final TTL normalization.

The other good news is that I think I’ve been able to get a partial read of one of Mark Arnold’s recordings. It’s not surprising to me that I can’t get an entire read of a copy of a 40 year old recording. This is a move in the right direction, because it gives me a good look at how the read card recovers a proper SCELBI recording. In fact, the TTL normalized signal looks different than what I get from a recording coming out of my system. I need to look closer at my write card operation.

I’ve spent the last couple of days trying to get SCELBI cassette interface working. Though I have made tapes with the write card, I’m having trouble reading them back with the read card. I’ve also tried some original SCELBI audio files provided by Mark Arnold, but no go on those either.

Assuming that my understanding is correct, the read circuit works much differently than what I expected to find. As expected, the first op-amp shapes and filters the signal into a nice normalized square wave. The following gates double the input signal speed and trigger a one shot on each falling edge of this double speed square wave.

Now here is the interesting part. The output of the one shot is filtered and converted into a level by another op-amp. High frequency signals will trigger the one shot more often tending to make the input to this op-amp to average a higher level than with lower frequency input. The output of the op-amp will follow the input. A TTL gate will normalize this output into a TTL one or zero, based on normal TTL level detection on the gate input.

I was expecting this circuit to work like a tone detector, where the circuit only triggers on a narrow range of frequencies. Instead the circuit divides the input frequency range into half and outputs zero on the lower half and a one on the upper half. The demarkation point is pretty much right between the 1350 HZ used for low frequency (zeros) and 2700 HZ used for high frequency (ones). The potentiometer can be used to tweak the center point to some degree. Experiments show that the output appears to be pretty unstable in the middle frequency zone.

There is also a -6 volt power supply built into this card that is used to power the op-amps, so that the card only requires a single +5 volt supply.

SCELBI Read Card Logic Blocks

The read program works a bit like a serial interface, by starting sampling on what amounts to be a start bit at the beginning of a burst of four bits. By my calculations, the first bit is sampled after about 2.2 milli-seconds and then a software timing loop samples the incoming signal for the remaining 3 bits at about a 1.5 milli-seconds interval. Each four bit data nibble, is paired with a 4 bit parity and state/status nibble that is encoded the same way. Two such pairs make up a complete byte.

The problem that I’m seeing is that the parity check fails all the time. So far, I can’t find anything obviously wrong, either with read or write, but I have a lot more things to check out before I become “stuck”.

SCELBI Cassette Read Card

Since I didn’t have information on the transistors used, I choose vanilla 2N3904 (NPN) and 2N3906 (PNP) transistors for this build. The 72741 OP-AMPs are vanilla 741 OP-AMPs in a 14 pin package. They are pretty hard to find in that package, but I did manage to snag a few off of eBay. I described where I found the yellow capacitors in a previous post. You will notice one carbon film resistor in the mix. That is because I forgot to order a 2700 ohm composition resistor, and I happened to have the right value carbon film resistor in my stash.

This card is essentially just a tone detector. I should be able to test functionality and performance and adjust it without hooking it up to my SCELBI by using a computer based tone generator application that I bought a while back. This is what I did when resurrecting the HAL ST-6 TTY terminal unit. Except for frequencies used, it basically does the same thing, though at a much less sophisticated level.

One unique thing about this board is that there isn’t a single VIA present.