I did a comparison of the hidden traces on my rev 0 replica with the fantastic image of the front bare Apple II rev 0 PCB, that I just received from Stanford University. I found that all of these “hidden” routes were precisely the same as the actual rev 0, except for two.
First was a trace I connected, that didn’t exist on the rev 0, but was later added on the rev 1. This is the pull up on pin 12 of the 74LS74 at B-10.
missing pullup on rev 0
The image on the left, is the original. Note that this missing trace is actually an undocumented bug in the rev 0. The trace connects the D input of a flip flop with a pull up. Without the D input to the flip flop being pulled up, it is left in a “floating state”, That means that when a clock edge is seen on the flip flop, that either a positive or negative level will be clocked in, depending on exactly where the input is floating at. Usually this will be a positive level, since 74LS input logic tends to float high, but it’s far from guaranteed. This flip-flop is used to indicate to the computer when a character is pressed on the keyboard. This floating input could cause the computer to miss keystrokes. I don’t remember this being a problem on my original rev 0, but the possibility is there.
When laying out the replica PCB, I ended up cutting up a socket on a later rev board in order to determine the route of this trace, not realizing that it wasn’t even present on the rev 0. The poor photocopy in the “RED BOOK” occasionally wasn’t good enough for me to solve a puzzle, and I had to resort to this sort of tactic, from time to time. In this case it failed me. Looking at the image now clearly shows that the trace wasn’t present, but there are other places on the photocopy where present traces are barely visible. For some reason traces that ran vertically often show up poorly in this photocopy.
74LS74 photocopy area
It you have one of my replica’s and want to experience authentic behavior, lift pin 12 of the flip-flop out of the socket (or you can bend it under so the change doesn’t look obvious). You probably will not notice any difference in behavior. You could also cut the trace, but I would recommend that you leave well enough alone and run it as is, with the input properly pulled up.
The second difference is also interesting. This difference resolves a misconception I had about the implementation of the fabled USER1 bus line on the Apple expansion slots. The USER1 jumper is documented incorrectly in the Apple II reference manual. The vias that need to be connected to enable USER1 are partly obscured by the ear of the Slot 7 connector, so adding this jumper, would have to be done from the back of the board. In Apple’s “Hobby/Prototyping Board” document it says “The function of this line will be described in a later document.” USER1 must not have been used by any I/O cards since it was reused on the IIe as 65C02 sync and changed again on the IIGS to M2 SEL.
The routing of trace in question is partly hidden by the ear of the slot 7 connector. I connected pin 39 of the peripheral bus, USER1, from the peripheral bus to the wrong via. This via directly connects to the enable on H12. USER1 should have connected to another via, that is not connected to anything else. The user was supposed to add a jumper between two vias to make this connection.
If you have one of my rev 0 replica’s I would do nothing. I have heard of no issues of peripheral card compatibility from replica builders over the years. You are more likely to have peripheral card problems because of the other changes that were introduced to the bus than with USER1 being connected to the enable of the decoder at H12.
There is a very minute possibility that you may have an issue with an unusual peripheral card that uses USER1 in an unexpected fashion. In this case, you can disconnect USER1 by carefully cutting the trace on the back of the PCB that leads from pin 39 (USER1) of the peripheral bus to the via that takes to the trace to the front of the board. Instead you could try cutting the trace where it connects to the via near the edge of the slot 7 connector. This will be more difficult because the ear of the connector partly obscures the via.
